logo-polimi
Loading...
Risorse bibliografiche
Risorsa bibliografica obbligatoria
Risorsa bibliografica facoltativa
Scheda Riassuntiva
Anno Accademico 2019/2020
Scuola Scuola di Ingegneria Industriale e dell'Informazione
Insegnamento 054081 - MICROELECTRONIC TECHNOLOGIES
Docente Mariani Marcello
Cfu 5.00 Tipo insegnamento Monodisciplinare
Didattica innovativa L'insegnamento prevede  1.0  CFU erogati con Didattica Innovativa come segue:
  • Blended Learning & Flipped Classroom
  • Soft Skills

Corso di Studi Codice Piano di Studio preventivamente approvato Da (compreso) A (escluso) Insegnamento
Ing Ind - Inf (Mag.)(ord. 270) - MI (471) BIOMEDICAL ENGINEERING - INGEGNERIA BIOMEDICA*AZZZZ054081 - MICROELECTRONIC TECHNOLOGIES
Ing Ind - Inf (Mag.)(ord. 270) - MI (476) ELECTRONICS ENGINEERING - INGEGNERIA ELETTRONICA*AZZZZ095379 - MICROELECTRONIC TECHNOLOGIES
054081 - MICROELECTRONIC TECHNOLOGIES
Ing Ind - Inf (Mag.)(ord. 270) - MI (486) ENGINEERING PHYSICS - INGEGNERIA FISICA*AZZZZ054081 - MICROELECTRONIC TECHNOLOGIES

Obiettivi dell'insegnamento

The course illustrates the unit processes needed to realize an integrated circuit on silicon substrates. Beside acquiring familiarity with the unit processes physics and tools, the students will also learn how to arrange those basic steps  into a process flow sequence. A simple CMOS circuit as well as a state of the art flash memory process flow will be analyzed.


Risultati di apprendimento attesi

Knowledge and undertsanding (Dublin descriptor 1):

After the course, the students will:

-Know the basic unit processes for an integrated circuit fabrication

-Understand the physics of the single process steps

-Understand the role of each process step in a CMOS and in a memory process flow

Applying knowledge and understanding (Dublin descriptor 2):

After the course, the students will:

-Be able to choose the best technique for each unit process step, based on the technology node and process flow requirements

-Understand how unit process properties must evolve as a function of technology node scaling

-Be able to predict the impact of a unit process step on the whole device process flow and on a device electrical performances


Argomenti trattati
  • Introduction
-Semiconductor industry history
-Semiconductor physics review
 
  • Process flow (1)
-Process flow for a CMOS device
 
  • Silicon
- Crystallography review (Bravais lattice, crystalline structures)
-Silicon lattice
- Defects and thermodynamics of point defects
-Mono-crystalline silicon growth (CZ)
-Silicon wafer fabrication process
 
  • Silicon oxidation
- Silicon oxide structure
- Deal and Grove model
-Oxidation kinetic dependence on substrate orientation and doping
- Oxidation and point defects
- Charged defects in silicon oxide and CV measurements
- Advanced silicon oxidation techniques
- High-k dielectrics
 
  • Dopant diffusion in silicon
- Fick’s law
- Analytical solutions to second Fick’s law (Gaussian and ERFC profiles)
- Correction to Fick’s law
- Diffusion and point defects
 
  • Ion implantation
- Ion implanter structure
- Implanted concentration profiles, channeling effects
- Nuclear and electronic ion stopping
- Crystallographic damage and TED
 
  • Lithography
- Lithogrpahy basics concepts and main lithographic system architectures
-Light sources
-Reticles
-Photo resist
-Registration
- Projection lithography;
- Resolution and depth of focus
-Advanced applications (immersion lithography, EUV, e-beam, self-aligned double patterning, self assembling block-co-polymers)
 
·                     Thin films deposition: CVD and PVD techniques
-Fluid dynamics basics
-APCVD and LPDCVD basic models
-Plasma-assisted CVD techniques
-Evaporation
-Sputtering
 
  • Etching
-Wet etching quick overview
-Plasma ecthing
 * Main properties
 * Plasma etchers
 * Etch chemistries
 * Basic models
 
  • Interconnects
- Local interconnects: silicides and salicides
- Contacts
   *Ohmic vs rectifying behavior
   *Main contact technologies
- Dielectrics: oxides and low-K materials
- Interconnects: subtractive and damascene approach
 
·                     NOR flash memory process flow
 
 
Text book
James D. Plummer, Michael D. Deal, Peter B. griffin, Silicon VLSI Technology. Fundamentals, Practice and Modeling, Prentice Hall, 2000, ISBN: 0130850373

Prerequisiti

A basic knowledge of semiconductor device physics is a plus, but most of the key necessary concepts are quickly recalled during the course.


Modalità di valutazione
The final exam consists of an oral interview (NO WRITTEN TEST).
During the oral interview, every student will be asked three questions slected randomly among the course topics. The questions purpose will be to understand if the student has acquired the proper knowledge of signle process steps physics and their role in an integrated cirucit process flow (Dublin descirptor1), and to verify that the students can autonomously estimate the impact of each step on the entire process flow as welll as the challenges related to technology scaling.
The students will also be aked to solve an excercise that will be randomly chosen smong a solved exercises list that the students will receive during the semester (and that will also be solved in class).
A mark between 0/30 and 30/30 will be assigned for each question/excercise; if the student attended the optional lab experience, additonal 2/30 point will be added to the final mark. If a 30/30 mark is assgned for each question and for the excercise, the final mark will be 30/30 cum laude.
 
 

Bibliografia
Risorsa bibliografica obbligatoriaJames D. Plummer, Michael Deal, Peter D. Griffin, Silicon VLSI Technology: Fundamentals, Practice, and Modeling , Editore: Prentice Hall, Anno edizione: 2001

Software utilizzato
Nessun software richiesto

Forme didattiche
Tipo Forma Didattica Ore di attività svolte in aula
(hh:mm)
Ore di studio autonome
(hh:mm)
Lezione
30:00
45:00
Esercitazione
20:00
30:00
Laboratorio Informatico
0:00
0:00
Laboratorio Sperimentale
0:00
0:00
Laboratorio Di Progetto
0:00
0:00
Totale 50:00 75:00

Informazioni in lingua inglese a supporto dell'internazionalizzazione
Insegnamento erogato in lingua Inglese
Disponibilità di materiale didattico/slides in lingua inglese
Disponibilità di libri di testo/bibliografia in lingua inglese
Possibilità di sostenere l'esame in lingua inglese
Disponibilità di supporto didattico in lingua inglese
schedaincarico v. 1.6.9 / 1.6.9
Area Servizi ICT
16/10/2021