Introductory concepts and background: The transistor as an amplifier, performance figures: maximum voltage gain, fT, power amplification and Johnson’s limit. MOSFET: quadratic I-V dependence, modulation of the channel length. Transconductance and maximum gain. Subthreshold operation. Dependence on bias point of transconductance and cut-off frequency. Stray capacitance. Multifinger MOSFET’s. gm/C figure of merit. Technologies for integrated circuit design.

OTA's and OP-AMP's: The differential stage with resististive loads. Performance of current mirrors. Effects of current mirror on differential and common mode gains. CMOS OTA’s. Two stages topology. Bias and systematic offset. Device Matching. Pelgrom’s formula. Input voltage offset. Cascoded mirrors. Impact on gain and CMRR. Frequency response. Pole splitting and GBWP. Slew Rate. GBWP/SR ratio. Alternative compensation strategies with buffers and nulling resistor. Single stage OTA’s. Telescopic/folded cascode topologies. Feed-forward compensation and impact on in-band doublet. Class AB OTA's. OP-AMPs and output stages.  

Complements on Noise: variance and power spectrum. Noise sources. Physical models of thermal noise and shot noise. Noise sources in FET's, input equivalent noise sources. 1/f noise and Tvidis formula. Input equivalent noise sources of OP-AMP’s.

Active filters: Introduction to active filters. First order cells. Canonical form for the pole pair. Q- factor of the pair. Filter sensitivity. Second-order cells. The Sallen-Key cell, loop gain, sizing options, impact on filter sensitivity. The Universal filter (KHN cell). Tow-Thomas cell. Options for filter synthesis: cascade of active cells, resonant ladder networks. Active inductors. Quality factor and noise. Implementation of active inductors with amplifiers and transconductors. Synthesis with integrators. Switched capacitor filters. SC-integrator. Output spectrum of a switched capacitor stage. Stray insensitive switches. Non-inverting integrator. Non-idealities of SC filters: finite gain, clock feed-through. Digital vs. Analog filters.

Labs are dedicated to design of CMOS amplifiers and active filters using CAD tools. The Lab activity provided realistic examples of the design process and and of the optimization procedures followed in professional practice.

The exam has a written test followed by an oral discussion.