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Risorsa bibliografica obbligatoria |
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Risorsa bibliografica facoltativa |
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Anno Accademico
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2017/2018
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Scuola
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Scuola di Ingegneria Industriale e dell'Informazione |
Insegnamento
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088949 - ADVANCED COMPUTER ARCHITECTURES
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Docente |
Sciuto Donatella
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Cfu |
5.00
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Tipo insegnamento
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Monodisciplinare
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Corso di Studi |
Codice Piano di Studio preventivamente approvato |
Da (compreso) |
A (escluso) |
Insegnamento |
Ing Ind - Inf (Mag.)(ord. 270) - MI (474) TELECOMMUNICATION ENGINEERING - INGEGNERIA DELLE TELECOMUNICAZIONI | * | A | ZZZZ | 089185 - HIGH PERFORMANCE PROCESSORS AND SYSTEMS (UIC 569) | M | ZZZZ | 088949 - ADVANCED COMPUTER ARCHITECTURES | Ing Ind - Inf (Mag.)(ord. 270) - MI (476) ELECTRONICS ENGINEERING - INGEGNERIA ELETTRONICA | * | M | ZZZZ | 088949 - ADVANCED COMPUTER ARCHITECTURES | Ing Ind - Inf (Mag.)(ord. 270) - MI (481) COMPUTER SCIENCE AND ENGINEERING - INGEGNERIA INFORMATICA | * | A | ZZZZ | 089185 - HIGH PERFORMANCE PROCESSORS AND SYSTEMS (UIC 569) | M | ZZZZ | 088949 - ADVANCED COMPUTER ARCHITECTURES |
Programma dettagliato e risultati di apprendimento attesi |
Course objective:
Main goal of the course is that the student understands all the major concepts used in modern microprocessors by the end of the semester.The course will cover the different forms of parallelism found in applications (instruction-level, data-level, thread-level, gate-level) and how these can be exploited with various architectural features. It will cover pipelining, superscalar, speculative and out-of-order execution, vector machines, VLIW machines, multithreading, graphics processing units, and parallel microprocessors. Final goal is to show how the software interacts with the hardware to provide performance and how trends in technology, application and economics have driven and drive continuing changes in the field. Main lectures topics:
- Review of basic computer architecture: the RISC approach and pipelining, the memory hierarchy
- Basic performance evaluation metrics of computer architectures
- Techniques for performance optimization: processor and memory
- Instruction level parallelism: static and dynamic scheduling; superscalar architectures: principles and problems; VLIW (Very Long Instruction Word) architectures, examples of architecture families
- Thread-level parallelism: architetctures
- Multiprocessors and multicore systems: taxonomy, topologies, communication management, memory management, cache coherency protocols, example of architectures
- Stream processors and vector processors; Graphic Processors, GP-GPUs
PRE-REQUIREMENTS: Basic concepts of logic design and computer architectures
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Note Sulla Modalità di valutazione |
The final examination consists of a WRITTEN EXAM.
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John Hennessy, David Patterson, Computer Architecture, A Quantitative Approach, Editore: Morgan Kaufmann, Fifth Edition Note:Additional information in slides and papers available through the course website in BeeP.
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Nessun software richiesto |
Tipo Forma Didattica
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Ore didattiche |
lezione
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30.0
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esercitazione
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20.0
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laboratorio informatico
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0.0
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laboratorio sperimentale
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0.0
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progetto
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0.0
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laboratorio di progetto
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0.0
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Informazioni in lingua inglese a supporto dell'internazionalizzazione |
Insegnamento erogato in lingua

Inglese
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Disponibilità di materiale didattico/slides in lingua inglese
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Disponibilità di libri di testo/bibliografia in lingua inglese
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Possibilità di sostenere l'esame in lingua inglese
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Disponibilità di supporto didattico in lingua inglese
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